MT#10257 Disable PROC=k8 setting to fix coredumps on certain Intel CPUs

Asterisk might coredump with "Illegal instruction", caused by:

| => 0x0000000000451b9b <+43>: prefetchw 0x4f0(%rbx)

PrefetchW is an AMD instruction and causes a fatal trap on
certain (older) Intel CPUs, e.g. see
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=52411

A system where Asterisk coredumps is for example:

| root@spce:~# grep -e cpu -e model /proc/cpuinfo
| cpu family      : 15
| model           : 4
| model name      : Intel(R) Xeon(TM) CPU 2.80GHz
| cpu MHz         : 2793.412
| cpuid level     : 5
| cpu family      : 15
| model           : 4
| model name      : Intel(R) Xeon(TM) CPU 2.80GHz
| cpu MHz         : 2793.412
| cpuid level     : 5
|
| root@spce:~# dmidecode
| [...]
| BIOS Information
|         Vendor: Dell Computer Corporation
|         Version: A04
|         Release Date: 09/22/2005
| [...]
| Base Board Information
|         Manufacturer: Dell Computer Corporation
|         Product Name: 0U9971
|         Version: A03
| [...]
| Processor Information
|         Socket Designation: PROC_1
|         Type: Central Processor
|         Family: Xeon
|         Manufacturer: Intel
|         ID: 43 0F 00 00 FF FB EB BF
|         Signature: Type 0, Family 15, Model 4, Stepping 3
|         Flags:
|                 FPU (Floating-point unit on-chip)
|                 VME (Virtual mode extension)
|                 DE (Debugging extension)
|                 PSE (Page size extension)
|                 TSC (Time stamp counter)
|                 MSR (Model specific registers)
|                 PAE (Physical address extension)
|                 MCE (Machine check exception)
|                 CX8 (CMPXCHG8 instruction supported)
|                 APIC (On-chip APIC hardware supported)
|                 SEP (Fast system call)
|                 MTRR (Memory type range registers)
|                 PGE (Page global enable)
|                 MCA (Machine check architecture)
|                 CMOV (Conditional move instruction supported)
|                 PAT (Page attribute table)
|                 PSE-36 (36-bit page size extension)
|                 CLFSH (CLFLUSH instruction supported)
|                 DS (Debug store)
|                 ACPI (ACPI supported)
|                 MMX (MMX technology supported)
|                 FXSR (FXSAVE and FXSTOR instructions supported)
|                 SSE (Streaming SIMD extensions)
|                 SSE2 (Streaming SIMD extensions 2)
|                 SS (Self-snoop)
|                 HTT (Multi-threading)
|                 TM (Thermal monitor supported)
| [...]

By not selecting this wrong CPU type we can avoid triggering this issue.

Thanks: Richard Fuchs for help in debugging this issue

Change-Id: I32a73e0889f5c7413d88e51d9a6d56a12f870486
(cherry picked from commit 32449123ee)

Makefile

@@ -167,7 +167,7 @@ OTHER_SUBDIR_CFLAGS=-I$(ASTTOPDIR)/include
 ifeq ($(OSARCH),linux-gnu)
   ifeq ($(PROC),x86_64)
     # You must have GCC 3.4 to use k8, otherwise use athlon
-    PROC=k8
+    #PROC=k8
     #PROC=athlon
   endif